Integrated circuit field effect transistors are widely used for consumer, commercial and other applications. As is well known to those having skill in the art, integrated circuit field effect transistors include spaced apart source/drain regions in a substrate and a channel region in the substrate between the spaced apart source/drain regions. An insulated gate is provided on the channel region between the spaced apart source/drain regions. The insulated gate may include a sidewall spacer on a sidewall thereof.
It is known that the carrier mobility in the channel region of a field effect transistor can be changed by applying stress to the channel region. Tensile or compressive stress may be applied to the channel region of a field effect transistor by fabricating a stress inducing silicon nitride structure, commonly referred to as a “stress nitride structure” on the field effect transistor. The fabrication and use of stress nitride structures on integrated circuit field effect transistors are well known to those having skill in the art and need not be described further herein.
It is also known that the performance of an integrated circuit field effect transistor may be increased as the stress nitride liner becomes thicker. Unfortunately, however, relatively thick stress nitride liners may include voids therein which can degrade the performance and/or reliability of the device.